Operational dual-core system
Both processor cores coordinate through bounded messaging and shared-memory transfer.
Flagship embedded platform / public technical project
Dual-Core Optical
Motion Testbed.
A complete embedded motion-control and measurement platform built around the STM32H747 dual-core architecture.
Herder Elektronische Systemen completed the embedded firmware, inter-core communications, shared-memory telemetry, host software, automated data acquisition, characterization tooling, electrical integration and customer-facing engineering documentation for an operational precision-motion research platform.
Operational system · Verified architecture · Reproducible test records · Customer-facing documentation
01 / System summary
Engineering across
the complete system.
This project required more than writing firmware for a microcontroller. The completed platform connects real-time motion sequencing, dual-core coordination, deterministic data movement, physical interfaces, host-side acquisition, fault supervision and repeatable engineering analysis.
The resulting system provides a documented path from commanded motion to timestamped records, live visualization, saved datasets and post-test characterization.
400 MHzCortex-M7 execution
200 MHzCortex-M4 execution
100 HzTimestamped transfer
64 bytesMotion record size
02 / Architecture
Control traffic and measurement data
follow separate paths.
The Cortex-M7 performs motion sequencing, sample production, shared-ring management and supervisory requests. The Cortex-M4 operates the remote OpenAMP endpoint, consumes shared-memory records, tracks sequence integrity and transfers validated telemetry to the host application.
OpenAMP/RPMsg is reserved for bounded coordination messages, while high-rate motion records move through a dedicated AXI-SRAM ring buffer. This prevents routine measurement traffic from competing with heartbeat, status and fault communication.
03 / Technical ownership
Firmware, host software
and physical interfaces.
Embedded platform
STM32H747 Cortex-M7 at 400 MHz and Cortex-M4 at 200 MHz; OpenAMP/RPMsg inter-core command and status transport; AXI-SRAM shared-memory ring buffer; explicit cache and MPU handling; timestamped 64-byte motion records; sequence-gap, overflow, dropped-record and protocol accounting; per-core heartbeat and fault reporting; STEP/DIR and differential encoder integration.
Host and validation software
Live telemetry and motion visualization; structured CSV logging with run metadata; malformed-row and incomplete-run detection; partial-run recovery; static and dynamic motion tests; step-response processing; low-speed tracking analysis; Allan deviation analysis; and closed-loop frequency-response characterization.
The platform was inherited as a multidisciplinary research system and completed as an operational engineering product.
The final delivery unified embedded firmware, dual-core communication, high-rate data transfer, physical motion interfaces, host software, automated acquisition, characterization workflows, PCB documentation and reproducible engineering evidence.
03 / Physical testbed
The built system
in the lab.
The project is presented as a complete physical platform, not only a firmware diagram. The released evidence shows the assembled motion mechanism, the mechanical stack, the controller and the test setup used for characterization.
04 / Results
From prototype hardware
to a testable platform.
Traceable motion data
Timestamped records include sequence and integrity information suitable for automated verification.
Low-speed testing
Controlled testing covers approximately 0.002–0.010 deg/s motion rates.
Repeatable workflows
Static and dynamic routines produce structured datasets with metadata and completion checks.
Documented interface
The public package includes encoder and STEP/DIR schematic, interface definition and PCB evidence.
Customer-facing records
Firmware, electrical records, release notes, checksums, FRDs and repository structure are published together.
05 / Documentation evidence
Engineering records that
carry the work forward.
Dual-Core Firmware and Host Engineering Report
Architecture, interfaces, telemetry, validation and implementation evidence.
Open firmware / host FRD ↗
Platform Electrical Engineering Report
Controller interfaces, encoder path, motor-control connections and PCB integration.
Open electrical FRD ↗
Encoder and STEP/DIR Interface Schematic
Public electrical record for the custom differential interface board.
Open schematic ↗06 / Public evidence
Inspect the
implementation.
The public repository preserves the release structure, firmware and host documentation, electrical records, architecture diagrams, measured results, source excerpts and checksums used to make the platform understandable and reproducible.
Need a difficult embedded platform completed?
Bring the
whole system.
We support R&D teams that need firmware, instrumentation, host software, electrical integration and technical evidence brought together into one understandable and testable system.
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